Alan Cox <[email protected]> writes:
>> static struct pci_bits amd_enable_bits[] = {
>> { 0x40, 1, 0x02, 0x02 },
>> { 0x40, 1, 0x01, 0x01 }
>> };
>
> The Nvidia ones have the register base at 0x50. Looking at the code I
> think its just a case of adding an 0x50 based enable_bits test to
> nv_pre_reset, and I'll fold that in now.
I see. Thanks again.
--
Krzysztof Halasa
--
VGER BF report: H 1.57724e-07
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