I'm been trying to wrap my head around all this memory barrier business,
and I'm slowly grasping the inter-CPU behaviours. Barriers with regard
to devices still has me a bit confused though.
The deviceiobook document and memory-barriers.txt both make it clear
that memory operations to devices are strictly ordered from a single
CPU. When more CPUs are involved, things get a bit fuzzier.
memory-barriers.txt seems to suggest that mmiowb() is only needed before
an unlock under special circumstances, but deviceiobook states that
mmiowb() should be used before all unlocks where the writeX():s aren't
followed by a readX() (which would flush the writes anyway).
Grepping the tree indicates that mmiowb() isn't used that often, but
according to deviceiobook, they should be plentiful. This leads me to
believe that memory-barriers.txt is closer to the truth, but then the
question is what those special cirumstances that require mmiowb() are.
Any clarifications you can provide are very welcome. :)
Rgds
Pierre
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