Re: + edac-new-opteron-athlon64-memory-controller-driver.patch added to -mm tree

[ebiederm@xmission.com (Eric W. Biederman)]

Andi Kleen <ak@muc.de> writes:

> On Thu, Jul 06, 2006 at 01:09:35PM -0600, Eric W. Biederman wrote:
>> > Then anything with MMIO or interrupts or anything dynamic 
>> > definitely belongs into kernel space agreed.
>> 
>> Yep we sometimes have to mess with MMIO.
>
> Not on K8 at least, no? 
>
> Maybe we should discuss each chipset separatedly :)
 :)

>> > But at least on K8 DIMM inventory is purely reading PCI config space on
>> > something that doesn't change and doesn't need any locking. 
>> > It also doesn't need to do anything complicated, but just look
>> > for the right PCI ID.
>> 
>> Mostly.  Except for the part where you have to figure out the stepping
>> of the processor connected to the memory controller to properly decode
>> the registers.  AMD should have used the revision field in pci config
>> space but...
>
> That's in /proc/cpuinfo

Some of it.  Taking a quick glance I can't seem to see a nodeid field.
Not that it especially likely you would have a system with mixed revision
cpus (it is a pain in the BIOS) but since it is possible it at least make
sense to try.

Eric

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