RE: [PATCH] cardbus: revert IO window limit

["Mallick, Asit K" <asit.k.mallick@intel.com>]

I am trying to find the register information. 440MX is an integration of
440BX north-bridge without AGP and PIIX4E (82371EB). PIIX4 quirk should
cover the ACPI and SMBus related I/O registers. Is there a pci dump for
this machine?

Thanks,
Asit


Linus Torvalds <mailto:torvalds@osdl.org> wrote on Friday, June 30, 2006
3:15 PM:

> On Fri, 30 Jun 2006, Dave Jones wrote:
>>  >
>>  > http://www.codemonkey.org.uk/cruft/440/
>>  > There's an assortment of docs for the other flavour Intel PCIsets
>> from  > that era in the same dir. 
>> 
>> Hrmm, actually that seems to have everything *but* config space
>> definitions. 
> 
> Yeah, I found those on the intel site too, but nothing with config
> space 
> access info.
> 
> It's surprising, actually. I usually have no trouble finding chipset
> config space info for intel chipsets.
> 
> Adding a few Intel people to the list, in the hope that they would
> know at 
> least the right person to ask.
> 
> Guys: the problem is that the 440MX (PCI ID: 8086:7194) seems to have
> some 
> magic IO register stuff again (probably ACPI or SMBus as usual), and
> we 
> don't know about them, and we don't have a quirk, so when the cardbus
> IO 
> range gets allocated, it can clash and cause trouble.
> 
> No docs seem to say _what_ the magic IO addresses are.. Pls help!
> 
> 		Linus
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