On Sat, 1 Jul 2006, Daniel Ritz wrote:
>
> nope. but from the docs available i would _guess_ this thing is really
> similar to the 82443BX/82371AB combination. at least the SMBus base address
> register is hidden at the very same place (32bit at 0x90 in function 3 of the
> "south" brigde)...so the attached little patch might be enough to fix things...
Alessio has PCI ID 8086:7194, which is not the 82443MX_3, so you'd need
something like this instead (but yes, it might indeed be the standard
PIIX4 quirks).
Linus
---
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 4364d79..0c073b4 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -401,6 +401,7 @@ static void __devinit quirk_piix4_acpi(s
piix4_io_quirk(dev, "PIIX4 devres J", 0x7c, 1 << 20);
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, quirk_piix4_acpi );
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82440MX_0, quirk_piix4_acpi );
/*
* ICH4, ICH4-M, ICH5, ICH5-M ACPI: Three IO regions pointed to by longwords at
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 9ae6b1a..889d4da 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2205,6 +2205,7 @@ #define PCI_DEVICE_ID_INTEL_82443LX_1 0x
#define PCI_DEVICE_ID_INTEL_82443BX_0 0x7190
#define PCI_DEVICE_ID_INTEL_82443BX_1 0x7191
#define PCI_DEVICE_ID_INTEL_82443BX_2 0x7192
+#define PCI_DEVICE_ID_INTEL_82440MX_0 0x7194
#define PCI_DEVICE_ID_INTEL_440MX 0x7195
#define PCI_DEVICE_ID_INTEL_440MX_6 0x7196
#define PCI_DEVICE_ID_INTEL_82443MX_0 0x7198
-
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