On Wed, Jun 28, 2006 at 10:34:48AM -0700, Greg KH wrote:
> On Wed, Jun 28, 2006 at 03:56:50PM +0200, Rafa? Bilski wrote:
> > This patch will allow Longhaul cpufreq driver to change frequency
> > without breaking BMDMA. In order to work properly it needs:
> > - adding rw_semaphore to pci_device and bus structures - this is
> > patch below,
> > - Longhaul should find host bridge and lock write on bus before
> > frequency change,
>
> Eeek! You mean the longhaul driver can change the frequency of the PCI
> bus? Oh, that's a recipe for disaster...
It *can* scale the FSB on some CPUs, but the Linux driver doesn't do that
as there a lot of systems that it just doesn't work on. (Probably any
that have FSB+PCI speed tied together). So we just scale the multiplier
and the voltage (Though currently in the driver, voltage scaling is missing,
so we never save any power, and just run at the maximum voltage the whole time).
The situation is : It needs there to be no bus mastering occuring at the time
of a CPU speed transition. Though I'm unable to find the part that mentions
this in the specs I have right now.
The really bizarre thing is that all this was working once. Circa 2.5.late/2.6.reallyearly
I had reliable scaling of both voltage and speed on a C3. Over time the
driver just seemed to fall apart. Perhaps we just got lucky before, and some
change occured that results changed behaviour of pci bus mastering for
some devices.
> No, this is not acceptable. What exactly do you want to do here? Make
> sure the PCI drivers are not doing DMA when the longhaul driver wants to
> change the pci bus speed?
>
> How often will this bus change happen?
>
> Does it really save battery?
99% of C3s aren't in battery powered devices, but it can save a considerable
amount of power (~75% on some of the earlier chips iirc).
Thankfully their newer cpu's aren't affected by this brain damage,
but there's a _lot_ of the older CPUs out there (all those EPIA boards etc).
Dave
--
http://www.codemonkey.org.uk
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