The class zero interrupt handling for spus
was confusing alignment and error interrupts,
so swap them.
Signed-off-by: Arnd Bergmann <[email protected]>
Index: linus-2.6/arch/powerpc/platforms/cell/spu_base.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_base.c
+++ linus-2.6/arch/powerpc/platforms/cell/spu_base.c
@@ -168,12 +168,12 @@ spu_irq_class_0_bottom(struct spu *spu)
stat &= mask;
- if (stat & 1) /* invalid MFC DMA */
- __spu_trap_invalid_dma(spu);
-
- if (stat & 2) /* invalid DMA alignment */
+ if (stat & 1) /* invalid DMA alignment */
__spu_trap_dma_align(spu);
+ if (stat & 2) /* invalid MFC DMA */
+ __spu_trap_invalid_dma(spu);
+
if (stat & 4) /* error on SPU */
__spu_trap_error(spu);
--
-
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