Re: tg3 broken on 2.6.17-rc5-mm3

["H. Peter Anvin" <hpa@c2micro.com>]

Bjorn Helgaas wrote:
> On Wednesday 07 June 2006 17:11, Bjorn Helgaas wrote:
> > Something changed between 2.6.17-rc5-mm2 and -mm3 that broke tg3
> > on my HP DL360:
>
> and the specific change that broke it seems to be:
>   gregkh-pci-pci-ignore-pre-set-64-bit-bars-on-32-bit-platforms.patch.
>
> pci_read:  0000:01:02.0 reg 0x10 len 4 val 0xf7ef0004
> pci_write: 0000:01:02.0 reg 0x10 len 4 val 0xffffffff
> pci_read:  0000:01:02.0 reg 0x10 len 4 val 0xffff0004
> pci_write: 0000:01:02.0 reg 0x10 len 4 val 0xf7ef0004
> pci_read:  0000:01:02.0 reg 0x14 len 4 val 0x0000
> pci_write: 0000:01:02.0 reg 0x14 len 4 val 0xffffffff
> pci_read:  0000:01:02.0 reg 0x14 len 4 val 0xffffffff
> pci_write: 0000:01:02.0 reg 0x14 len 4 val 0x0000

... this is a 64-bit BAR preset with a 16-bit mask, preset
to the valid 32-bit address 0x0000_0000_f7ef_0000.

> pci_write: 0000:01:02.0 reg 0x10 len 4 val 0x0004  <=== looks questionable
> pci_write: 0000:01:02.0 reg 0x14 len 4 val 0x0000

... here the algorithm thinks the addrss is above 4 GB and disables it. 
 It should re-enable it when the device is turned back on, though; if 
it doesn't that's very strange.

Anyway, the error seems to be that the line:

+			} else if (l) {

... should be ...

+			} else if (lhi) {

... since l contains the lower half of the pre-set address at that 
point, and lhi is the upper half.

	-hpa
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