Robert Hancock wrote:
H. Peter Anvin wrote:
For something that generates I/O transactions, it's imperative to
generate the smallest possible number of transactions. Furthermore,
smaller than dword transactions aren't burstable, except at the
beginning and end of a burst.
Well, theoretically for writes they could be, if the memory region was
prefetchable and the PCI chipset supported byte merge. It certainly
isn't optimal however.
If so, then merging doesn't matter either way.
-hpa
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