> -----Original Message----- > From: Rune Torgersen > Sent: Thursday, June 01, 2006 16:10 > To: [email protected] > Subject: SII3124-2 > > Has anybody been successful in getting a SII3124-2 based SATA > controller > to work under PPC? > > I have a eval board that I tried on two different freescale boards (a > MPC8266ADS board and a MPC8560ADS board). > Kernel 2.6.16.16. > > Here is the relevant output from the kernel. > > ata1: SATA max UDMA/100 cmd 0xD1010000 ctl 0x0 bmdma 0x0 irq 115 > ata2: SATA max UDMA/100 cmd 0xD1012000 ctl 0x0 bmdma 0x0 irq 115 > ata3: SATA max UDMA/100 cmd 0xD1014000 ctl 0x0 bmdma 0x0 irq 115 > ata4: SATA max UDMA/100 cmd 0xD1016000 ctl 0x0 bmdma 0x0 irq 115 > ata1: SATA link down (SStatus 0) > scsi0 : sata_sil24 > ata2: SATA link up 3.0 Gbps (SStatus 123) > sata_sil24 ata2: SRST failed, disabling port > scsi1 : sata_sil24 > ata3: SATA link down (SStatus 0) > scsi2 : sata_sil24 > ata4: SATA link down (SStatus 0) > scsi3 : sata_sil24 > > I added debug output to see the content of the Command Error register. > It is set to 26 which according to the datasheet for the 3124-1 (I am > running a -2), is PLDCMDERRORMASTERABORT, "A PCI Master Abort occurred > while the SiI3124 was fetching a Port Request Block (PRB) from host > memory." There is an endian issue in the sil24 driver. The follwing pathc seems to fix it for me. (it is also attached in case the mailer borks it for me) Signed-off-by: Rune Torgersen <[email protected]> Index: linux-innsys-2.6.16.16/drivers/scsi/sata_sil24.c =================================================================== --- linux-innsys-2.6.16.16/drivers/scsi/sata_sil24.c (revision 101) +++ linux-innsys-2.6.16.16/drivers/scsi/sata_sil24.c (working copy) @@ -446,7 +446,7 @@ */ msleep(10); - prb->ctrl = PRB_CTRL_SRST; + prb->ctrl = cpu_to_le16(PRB_CTRL_SRST); prb->fis[1] = 0; /* no PM yet */ writel((u32)paddr, port + PORT_CMD_ACTIVATE); @@ -537,9 +537,9 @@ if (qc->tf.protocol != ATA_PROT_ATAPI_NODATA) { if (qc->tf.flags & ATA_TFLAG_WRITE) - prb->ctrl = PRB_CTRL_PACKET_WRITE; + prb->ctrl = cpu_to_le16(PRB_CTRL_PACKET_WRITE); else - prb->ctrl = PRB_CTRL_PACKET_READ; + prb->ctrl = cpu_to_le16(PRB_CTRL_PACKET_READ); } else prb->ctrl = 0;
Attachment:
sil24_endian_patch
Description: sil24_endian_patch
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