From: Thomas Gleixner <[email protected]>
Fixup the conversion to generic irq subsystem.
Signed-off-by: Thomas Gleixner <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
---
arch/arm/mach-at91rm9200/gpio.c | 12 ++++++------
arch/arm/mach-at91rm9200/time.c | 2 +-
2 files changed, 7 insertions(+), 7 deletions(-)
Index: linux-genirq.q/arch/arm/mach-at91rm9200/gpio.c
===================================================================
--- linux-genirq.q.orig/arch/arm/mach-at91rm9200/gpio.c
+++ linux-genirq.q/arch/arm/mach-at91rm9200/gpio.c
@@ -261,21 +261,21 @@ static void gpio_irq_handler(unsigned ir
void __iomem *pio;
u32 isr;
- pio = desc->base;
+ pio = get_irq_chip_data(irq);
/* temporarily mask (level sensitive) parent IRQ */
- desc->chip->ack(irq);
+ desc->handler->ack(irq);
for (;;) {
isr = __raw_readl(pio + PIO_ISR) & __raw_readl(pio + PIO_IMR);
if (!isr)
break;
- pin = (unsigned) desc->data;
+ pin = (unsigned) get_irq_data(irq);
gpio = &irq_desc[pin];
while (isr) {
if (isr & 1) {
- if (unlikely(gpio->disable_depth)) {
+ if (unlikely(gpio->depth)) {
/*
* The core ARM interrupt handler lazily disables IRQs so
* another IRQ must be generated before it actually gets
@@ -284,14 +284,14 @@ static void gpio_irq_handler(unsigned ir
gpio_irq_mask(pin);
}
else
- gpio->handle(pin, gpio, regs);
+ desc_handle_irq(pin, gpio, regs);
}
pin++;
gpio++;
isr >>= 1;
}
}
- desc->chip->unmask(irq);
+ desc->handler->unmask(irq);
/* now it may re-trigger */
}
Index: linux-genirq.q/arch/arm/mach-at91rm9200/time.c
===================================================================
--- linux-genirq.q.orig/arch/arm/mach-at91rm9200/time.c
+++ linux-genirq.q/arch/arm/mach-at91rm9200/time.c
@@ -22,13 +22,13 @@
#include <linux/config.h>
#include <linux/init.h>
#include <linux/interrupt.h>
+#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/time.h>
#include <asm/hardware.h>
#include <asm/io.h>
-#include <asm/irq.h>
#include <asm/mach/time.h>
/*
-
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