Hello.
Alan Cox wrote:
I finally got all the documents rounded up to try and redo Jgarzik's
PIIX driver a bit more completely (I'm short MPIIX if anyone has it ?)
I then started reading the docs and the code and noticing a couple of
problems
1. We set IE1 on PIO0-2 which the docs say is for PIO3+
For PIO2+ actually, according to Intel's PRM (29860004.pdf), and it's said
to have no effect in the lower modes. This is actually not very correct since
when one issues Set Transfer Mode ATA command with the value (8 + PIOn), this
means select PIO _flow control_ mode n, so -IORDY is assumed to be in use.
I'm also not clear if the "no MWDMA0" list has been updated correctly
for the newer chipsets.
What is/was the point for keeping MW DMA 0 support anyway? On PIIX, it's
greatly slowed down (600 vs 480 ns cycle) and was never "offically" supported
by Intel.
MBR, Sergei
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