Gross, Mark wrote:
You can never predict when a SMI will bubble through the system. Even
if you handle case where the BIOS re-hides Dev0:Fun1 and not panic how
do you deal with the race between the BIOS SMI based handling and the
driver? Who will end up reading (and clearing) the error registers
first? There is no good way to share today.
You could (at least from memory, on certain chipsets) modify the error
reporting registers so that an SMI is no longer generated as a result of
MC ECC errors. True, this doesn't fix many of the other problems
related to this issue, but would be useful in a "modprobe xyz_edac
force_unhide_MC_PCI=1" case.
Closed-source BIOSes eh? Who needs em ;-p.
Tim.
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