Lee Revell wrote:
On Sat, 2006-04-08 at 14:10 +1000, Neil Brown wrote:
To explain what I think is happening, let me start with a very simple
case. A number of PCI devices (this one included) have a number of
events which can trigger an interrupt. The events which are current
are presented as bits in a register, and are ORed together (and
possibly masked by another register) to make the IRQ line.
When 1's are written to any bits in this register, it acknowledges
the event and clears the bit.
A typical code fragment is
events = read_register(INTERRUPTS);
write_register(INTERRUPTS, events);
... handle each 1 bits in events ....
Isn't a more typical IRQ handler:
while (events = read_register(INTERRUPTS) != 0) {
...handle each bit in events and ACK it...
}
That would be less efficient, it would read the register twice or more
if any events have been set, and reading device registers can be
expensive. In the unlikely event the event was set while inside the ISR
the interrupt should be asserted again so there is no need to do this.
--
Robert Hancock Saskatoon, SK, Canada
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Home Page: http://www.roberthancock.com/
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