Re: Synchronizing Bit operations V2

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Christoph Lameter wrote:
On Fri, 31 Mar 2006, Chen, Kenneth W wrote:


I think we could say that lock semantics are different from barriers. They are more like acquire and release on IA64. The problem with smb_mb_*** is that the coder *explicitly* requested a barrier operation and we do not give it to him.
I was browsing sparc64 code and it defines:

include/asm-sparc64/bitops.h:
#define smp_mb__after_clear_bit()      membar_storeload_storestore()

With my very naïve knowledge of sparc64, it doesn't look like a full barrier.
Maybe sparc64 is broken too ...

Dave, how does sparc64 handle this situation?
It looks like sparc64 always expects paired smp_mb__* operations,
before and after the clear_bit.

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SUSE Labs, Novell Inc.
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