On Wed, 2006-03-08 at 13:31 -0800, Bryan O'Sullivan wrote:
> In some circumstances, a CPU may perform stores to memory in non-program
> order, or held in on-chip store buffers for a potentially long time.
> These kinds of circumstances include:
>
> - Stores to a PCI MMIO region that has write combining enabled
>
> - Use of non-temporal store instructions
>
> - The CPU's memory model permitting weak store ordering
>
> This patch introduces a new macro, flush_wc(), that flushes any pending
> stores from the local CPU's write combining store buffers, if the CPU has
> such a capability. If the CPU doesn't provide explicit control over write
> combining, flush_wc() is simply an alias for wmb(). Here is an example:
I think people already don't undersatnd the existing gazillion of
barriers we have with quite unclear semantics in some cases, it's not
time to add a new one ...
Ben.
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