Re: [PATCH] Document Linux's memory barriers

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



You need to explain the difference between the compiler reordering and the 
control of the compilers arrangement of loads and stores and the cpu 
reordering of stores and loads. Note that IA64 has a much more complete 
set of means to reorder stores and loads. i386 and x84_64 processors can 
only do limited reordering. So it may make sense to deal with general 
reordering and then explain i386 as a specific limited case.

See the "Intel Itanium Architecture Software Developer's Manual" 
(available from intels website). Look at Volume 1 section 2.6 
"Speculation" and 4.4 "Memory Access"

Also the specific barrier functions of various locking elements varies to 
some extend.
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to [email protected]
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[Index of Archives]     [Kernel Newbies]     [Netfilter]     [Bugtraq]     [Photo]     [Stuff]     [Gimp]     [Yosemite News]     [MIPS Linux]     [ARM Linux]     [Linux Security]     [Linux RAID]     [Video 4 Linux]     [Linux for the blind]     [Linux Resources]
  Powered by Linux