On Tuesday, March 7, 2006 9:40 am, Matthew Wilcox wrote:
> On Tue, Mar 07, 2006 at 05:36:59PM +0000, David Howells wrote:
> > David Howells <[email protected]> wrote:
> > > I suspect, then, that x86_64 should not have an SFENCE for
> > > smp_wmb(), and that only io_wmb() should have that.
> >
> > Hmmm... We don't actually have io_wmb()... Should the following be
> > added to all archs?
> >
> > io_mb()
> > io_rmb()
> > io_wmb()
>
> it's spelled mmiowb(), and reads from IO space are synchronous, so
> don't need barriers.
To expand on willy's note, the reason it's called mmiowb as opposed to
iowb is because I/O port acccess (inX/outX) are inherently synchronous
and don't need barriers. mmio writes, however (writeX) need barrier
operations to ensure ordering on some platforms.
This raises the question of what semantics the unified I/O mapping
routines have... are ioreadX/iowriteX synchronous or should we define
the barriers you mention above for them? (IIRC ppc64 can use an io read
ordering op).
Jesse
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