Roland> I should look into getting some niagara machines to test
Roland> with -- with PCIe slots they should actually be good for
Roland> IB testing.
David> You'll be cpu limited until we have Van Jacobson net
David> channels.
For IPoIB maybe but not for native IB which offloads all transport to
the HCA... I'd be surprised if the bottleneck were anywhere other than
the bus, even on niagara.
David> Also, since our existing Linux "generic" MSI code is so
David> riddled with x86'isms (it was written by an Intel person,
David> so this is just the status quo), it will be a while before
David> MSI interrupts are supported on sparc64.
Yeah, I've always wanted to make the MSI stuff generic and handle the
embedded ppc chips that have MSI, but I've never had a good enough
reason to really work on it -- it's just been at the level of "that
would be fun." Now that IBM cares I hope it will get done soon.
Anyway IB works fine with standard INTx interrupts -- MSI is just icing.
The Niagara boxes seem like a fun toy if I can get budget for it --
and 32 threads are probably good for flushing out SMP races.
- R.
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