On Fri, 3 Mar 2006, Linus Torvalds wrote:
>
> I suspect you have some bug in your implementation. I think Dekker's
> algorithm depends on the reads and writes being ordered, and you don't
> seem to do that.
IOW, I think you need a full memory barrier after the
"lock->turn = cpu ^ 1;"
and you should have a "smp_rmb()" in between your reads of
"lock->flags[cpu ^ 1]"
and
"lock->turn"
to give the ordering that Dekker (or Peterson) expects.
IOW, the code should be something like
lock->flags[other] = 1;
smp_wmb();
lock->turn = other
smp_mb();
while (lock->turn == cpu) {
smp_rmb();
if (!lock->flags[other])
break;
}
where the wmb's are no-ops on x86, but the rmb's certainly are not.
I _suspect_ that the fact that it starts working with an 'sfence' in there
somewhere is just because the sfence ends up being "serializing enough"
that it just happens to work, but that it has nothing to do with the
current kernel wmb() being wrong.
Linus
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