On Thu, 2006-02-23 at 14:27 +0800, erich wrote:
> Dear Christoph Hellwig,
>
> I have figure out your comments about "remove internal queueing" and "remove
> odd ioctl".
> But about "hardware datastructures", areca's firmware spec is need to get a
> trunk of contingous memory space under 4G.
> In 64bit platform arcmsr need to make sure all ccbs have same of
> ccb_phyaddr_hi32 physical address.
> If arcmsr use dma_pool_alloc do a separate dma mapping.
> Is there any method to avoid ccbs pool cross 4G segment?
the pci mapping layer prevents that already entirely; there is a LOT of
hardware that cannot deal with segments crossing 4G boundaries, so much
in fact that it's now generically disabled.
> In some mainboard if I always enable msi function, it will cause system hang
> up.
> If it is not a config option, do you have any idea to avoid this issue?
how about a module option (module_param)?
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