Re: make -j with j <= 4 seems to only load a single CPU core

[Sam Ravnborg <sam@ravnborg.org>]

On Tue, Feb 21, 2006 at 10:10:46PM +0100, Jesper Juhl wrote:
> On 2/21/06, Jesper Juhl <jesper.juhl@gmail.com> wrote:
> > This is quite odd and I've no idea where to start looking for the
> > cause, but let me describe what I'm seeing and maybe someone can point
> > me in the right direction.
> >
> > I'm running SMP 2.6.x kernels on a Athlon 64 X2 4400+
> >
> 
> I should probably mention that the kernel I'm currently running and
> observing this behaviour with is 2.6.16-rc4-mm1.

Hi Jesper.
Could you please double check that patch below has been applied to your
tree.

	Sam

diff-tree 36cbbe5eb9857730768aa5f54ad94d69e0b2133d (from 9f672004ab1a8094bec1785b39ac683ab9eebebc)
Author: Benjamin LaHaise <bcrl@kvack.org>
Date:   Wed Feb 15 15:17:35 2006 -0800

    [PATCH] kbuild: revert "fix make -jN with multiple targets with O=..."
    
    Commit 296e0855b0f9a4ec9be17106ac541745a55b2ce1:
    
        "kbuild: fix make -jN with multiple targets with O=..."
    
    causes a ~95% increase in build time for the kernel.  Before: 4m21s
    after: 8m1.403s.  Can we revert this until another approach is found?
    
    Cc: Sam Ravnborg <sam@ravnborg.org>
    Signed-off-by: Andrew Morton <akpm@osdl.org>
    Signed-off-by: Linus Torvalds <torvalds@osdl.org>

diff --git a/Makefile b/Makefile
index 74d67b2..48d569d 100644
--- a/Makefile
+++ b/Makefile
@@ -104,17 +104,16 @@ ifneq ($(KBUILD_OUTPUT),)
 saved-output := $(KBUILD_OUTPUT)
 KBUILD_OUTPUT := $(shell cd $(KBUILD_OUTPUT) && /bin/pwd)
 $(if $(KBUILD_OUTPUT),, \
      $(error output directory "$(saved-output)" does not exist))
 
-.PHONY: $(MAKECMDGOALS) cdbuilddir
-$(MAKECMDGOALS) _all: cdbuilddir
+.PHONY: $(MAKECMDGOALS)
 
-cdbuilddir:
+$(filter-out _all,$(MAKECMDGOALS)) _all:
 	$(if $(KBUILD_VERBOSE:1=),@)$(MAKE) -C $(KBUILD_OUTPUT) \
 	KBUILD_SRC=$(CURDIR) \
-	KBUILD_EXTMOD="$(KBUILD_EXTMOD)" -f $(CURDIR)/Makefile $(MAKECMDGOALS)
+	KBUILD_EXTMOD="$(KBUILD_EXTMOD)" -f $(CURDIR)/Makefile $@
 
 # Leave processing to above invocation of make
 skip-makefile := 1
 endif # ifneq ($(KBUILD_OUTPUT),)
 endif # ifeq ($(KBUILD_SRC),)
-
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