Re: athlon 64 dual core tsc out of sync

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Lee Revell wrote:

On Sat, 2006-02-04 at 20:45 -0500, Albert Cahalan wrote:
You clearly haven't been paying attention. Lots of computers vary the
clock rate. They do this several ways.
I certainly have been paying attention.  Most of these problems are
theoretical.  In practice the only commonly used hardware where the TSC
is so unreliable as to be unusable are dual core Athlons.

Please check the jackit-devel (this app has tight RT constraints and
used to use the TSC directly for timing so problems show up quickly)
list for details - we have seen zero bug reports due to CPU frequency
scaling issues, and TONS related to the Athlon X2.

Lee

Actually my problem relates to both, seeing as how most people with 
athlon x2's probably have cpufreq compiled and working concurrently, I'd 
say they're pretty much tied together.  Though it's very much likely 
that the architecture of the athlon x2 makes cpufreq cause timing issues.

I dont know of anyone who's had just the athlon x2 in smp mode without cpufreq have these timing sync issues... I could be mistaken, but every message i've seen relating to X2's is "frequency has changed, blah blah blah" timing errors.
In any case it's been generally accepted that pm timer is suggested to 
get around these errors, but i've been unable to use mine, there is no 
config option in menuconfig/gconfig etc and my .config seems to show 
that it's compiled in.   Boot args like timer=pmtmr and just pmtmr and 
having nothing have resulted in the same dmesg output , with no mention 
of using the pm-timer.   I know I used it in 2.6.14.3 and never had any 
sync issues, my setup and config hasn't changed since then except for 
the use of libata for pata.   So how can i determine what's going on 
here?   Default or not, i'd like to get the pmtmr in use if it's what 
works.

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