Florian Weimer <[email protected]> writes:
First please send x86-64 patches cc to the maintainer, things can
get lost in the noise of the list.
> The spurious MCE is TLB-related. I *think* the bit for the correct
> status code is stored at position 10 HEX, not 10 DEC. At least I
> still get those MCEs on a two-way Opteron box, even though they are
> supposed to be filtered out.
No, 10 is the correct bit index. But normally it's set by BIOS anyways.
The reason you still see it is that setting the bit here only
prevent MCE exceptions, but it's still logged and the regular polling
picks them up anyways. I have not found a nice way to handle this
(other than adding a ugly CPU specific special case in the middle
of the nice cpu independent machine check handler, which I couldn't
bring myself to do so far...)
-Andi
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