David Luyer wrote:
Your new SKY2 driver in the latest 2.6.16-rc1 snapshots does millions
of printk()s (approximately 230,000 per second) ... but works!
Motherboard: A7V-E SE (onboard Marvel GE)
OS: Linux current snapshot (2.6.16-rc1-g0f36b018), 32-bit on AMD64
PCI options: ACPI, PCI, PCI Express, MSI enabled
dmesg|egrep 'sky2|messages suppressed':
sky2 v0.13 addr 0xdc000000 irq 66 Yukon-EC (0xb6) rev 2
sky2 eth0: addr 00:13:d4:f6:be:52
sky2 0000:05:00.0: pci express error (0x0)
Can you see if this patch makes any difference?
Thanks.
Date: Wed, 11 Jan 2006 15:37:01 -0800
From: Stephen Hemminger <[email protected]>
To: "Dmitrij D. Czarkoff" <[email protected]>, Daniel Drake
<[email protected]>
Cc: [email protected]
Subject: sky2: error reporting
Message-ID: <[email protected]>
In-Reply-To: <[email protected]>
References: <[email protected]>
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Try this, it limits the console output and attempts to handle more
errors. Of course, I see no errors on my systems (that would make
this problem too easy)...
Index: sky2-work/drivers/net/sky2.c
===================================================================
--- sky2-work.orig/drivers/net/sky2.c 2006-01-11 13:54:23.000000000 -0800
+++ sky2-work/drivers/net/sky2.c 2006-01-11 15:19:56.000000000 -0800
@@ -1900,8 +1900,9 @@
{
struct net_device *dev = hw->dev[port];
- printk(KERN_INFO PFX "%s: hw error interrupt status 0x%x\n",
- dev->name, status);
+ if (printk_ratelimit())
+ printk(KERN_INFO PFX "%s: hw error interrupt status 0x%x\n",
+ dev->name, status);
if (status & Y2_IS_PAR_RD1) {
printk(KERN_ERR PFX "%s: ram data read parity error\n",
@@ -1918,12 +1919,14 @@
}
if (status & Y2_IS_PAR_MAC1) {
- printk(KERN_ERR PFX "%s: MAC parity error\n", dev->name);
+ if (printk_ratelimit())
+ printk(KERN_ERR PFX "%s: MAC parity error\n", dev->name);
sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
}
if (status & Y2_IS_PAR_RX1) {
- printk(KERN_ERR PFX "%s: RX parity error\n", dev->name);
+ if (printk_ratelimit())
+ printk(KERN_ERR PFX "%s: RX parity error\n", dev->name);
sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
}
@@ -1935,43 +1938,64 @@
static void sky2_hw_intr(struct sky2_hw *hw)
{
+ struct pci_dev *pdev = hw->pdev;
u32 status = sky2_read32(hw, B0_HWE_ISRC);
+ sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
+ /* This driver doesn't use receive timestamps */
if (status & Y2_IS_TIST_OV)
sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
+ if (status & Y2_IS_PCI_NEXP) {
+ if (printk_ratelimit())
+ printk(KERN_INFO PFX "%s: pci express abort\n",
+ pci_name(pdev));
+ }
+
if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
u16 pci_err;
- pci_read_config_word(hw->pdev, PCI_STATUS, &pci_err);
- printk(KERN_ERR PFX "%s: pci hw error (0x%x)\n",
- pci_name(hw->pdev), pci_err);
+ pci_read_config_word(pdev, PCI_STATUS, &pci_err);
+ if (printk_ratelimit())
+ printk(KERN_ERR PFX "%s: pci hw error (0x%x)\n",
+ pci_name(pdev), pci_err);
- sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
- pci_write_config_word(hw->pdev, PCI_STATUS,
+ pci_write_config_word(pdev, PCI_STATUS,
pci_err | PCI_STATUS_ERROR_BITS);
- sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
}
- if (status & Y2_IS_PCI_EXP) {
- /* PCI-Express uncorrectable Error occurred */
- u32 pex_err;
+ if (status & Y2_IS_PCI_EXP) { /* PCI-Express error */
+ u32 err;
- pci_read_config_dword(hw->pdev, PEX_UNC_ERR_STAT, &pex_err);
+ pci_read_config_dword(pdev, PEX_UNC_ERR_STAT, &err);
+ if (err) {
+ if (net_ratelimit())
+ printk(KERN_INFO PFX
+ "%s: pci express uncorrectable error (0x%x)\n",
+ pci_name(pdev), err);
- printk(KERN_ERR PFX "%s: pci express error (0x%x)\n",
- pci_name(hw->pdev), pex_err);
+ if (err & PEX_FATAL_ERRORS) {
+ u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
- /* clear the interrupt */
- sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
- pci_write_config_dword(hw->pdev, PEX_UNC_ERR_STAT,
- 0xffffffffUL);
- sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
+ printk(KERN_ERR PFX "%s: adapter failed\n", pci_name(pdev));
- if (pex_err & PEX_FATAL_ERRORS) {
- u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
- hwmsk &= ~Y2_IS_PCI_EXP;
- sky2_write32(hw, B0_HWE_IMSK, hwmsk);
+ hwmsk &= ~Y2_IS_PCI_EXP;
+ sky2_write32(hw, B0_HWE_IMSK, hwmsk);
+
+ /* Should we turn off all interrupts?? */
+ }
+
+ /* clear the interrupt */
+ pci_write_config_dword(pdev, PEX_UNC_ERR_STAT, 0xffffffffUL);
+ }
+
+ pci_read_config_dword(pdev, PEX_COR_ERR_STAT, &err);
+ if (err) {
+ if (printk_ratelimit())
+ printk(KERN_INFO PFX
+ "%s: pci express correctable error (0x%x)\n",
+ pci_name(pdev), err);
+ pci_write_config_dword(pdev, PEX_COR_ERR_STAT, 0xffffffffUL);
}
}
@@ -1980,6 +2004,8 @@
status >>= 8;
if (status & Y2_HWE_L1_MASK)
sky2_hw_error(hw, 1, status);
+
+ sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
}
static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
Index: sky2-work/drivers/net/sky2.h
===================================================================
--- sky2-work.orig/drivers/net/sky2.h 2006-01-11 13:54:23.000000000 -0800
+++ sky2-work/drivers/net/sky2.h 2006-01-11 15:18:12.000000000 -0800
@@ -10,9 +10,25 @@
#define PCI_DEV_STATUS 0x7c
#define PCI_OS_PCI_X (1<<26)
-#define PEX_LNK_STAT 0xf2
-#define PEX_UNC_ERR_STAT 0x104
-#define PEX_DEV_CTRL 0xe8
+#define PEX_CAP_ID 0xe0 /* 8 bit PEX Capability ID */
+#define PEX_NITEM 0xe1 /* 8 bit PEX Next Item Pointer */
+#define PEX_CAP_REG 0xe2 /* 16 bit PEX Capability Register */
+#define PEX_DEV_CAP 0xe4 /* 32 bit PEX Device Capabilities */
+#define PEX_DEV_CTRL 0xe8 /* 16 bit PEX Device Control */
+#define PEX_DEV_STAT 0xea /* 16 bit PEX Device Status */
+#define PEX_LNK_CAP 0xec /* 32 bit PEX Link Capabilities */
+#define PEX_LNK_CTRL 0xf0 /* 16 bit PEX Link Control */
+#define PEX_LNK_STAT 0xf2 /* 16 bit PEX Link Status */
+
+/* PCI Express Extended Capabilities */
+#define PEX_ADV_ERR_REP 0x100 /* 32 bit PEX Advanced Error Reporting */
+#define PEX_UNC_ERR_STAT 0x104 /* 32 bit PEX Uncorr. Errors Status */
+#define PEX_UNC_ERR_MASK 0x108 /* 32 bit PEX Uncorr. Errors Mask */
+#define PEX_UNC_ERR_SEV 0x10c /* 32 bit PEX Uncorr. Errors Severity */
+#define PEX_COR_ERR_STAT 0x110 /* 32 bit PEX Correc. Errors Status */
+#define PEX_COR_ERR_MASK 0x114 /* 32 bit PEX Correc. Errors Mask */
+#define PEX_ADV_ERR_CAP_C 0x118 /* 32 bit PEX Advanced Error Cap./Ctrl */
+#define PEX_HEADER_LOG 0x11c /* 4x32 bit PEX Header Log Register */
/* Yukon-2 */
enum pci_dev_reg_1 {
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