Bryan> On x86_64, we fiddle with the MTRRs to enable write
Bryan> combining, which makes a huge difference to performance.
Bryan> It's not clear to me what we should even do on other
Bryan> architectures, since the only generic entry point that even
Bryan> exposes write combining is pci_mmap_page_range, which is
Bryan> for PCI mmap through userspace, and half the arches I've
Bryan> looked at ignore its write_combine parameter.
Jes> A job for mmiowb() perhaps?
I don't think the semantics of mmiowb() do what is desired here.
mmiowb() is all about ordering writes between separate CPUs, and the
issue at hand here is that write-combining buffers might reorder
writes from a single CPU.
- R.
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