Re: Inclusion of x86_64 memorize ioapic at bootup patch

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some code clear 3 byte in mptable from 0x468

00000460: 41 01 09 12 03 00 0f 00 41 02 09 13 03 00 0f 00
00000470: 41 03 09 10 03 03 05 00 43 00 ff 00 03 01 05 00
00000480: 43 00 ff 01

00000460: 41 01 09 12 03 00 0f 00 00 00 00 13 03 00 0f 00
00000470: 41 03 09 10 03 03 05 00 43 00 ff 00 03 01 05 00
00000480: 43 00 ff 01

it is third irq entry for pcie slot....

//Slot  PCIE x4
        for(i=0;i<4;i++) {
                smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804b_4, (0x00<<2)|i,
apicid_ck804b, 0x10 + (1+i+4-sbdnb%4)%4);
        }


/*Local Ints:   Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#*/
        smp_write_intsrc(mc, mp_ExtINT,
MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL,
0x0);
        smp_write_intsrc(mc, mp_NMI,
MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL,
0x1);

the range already in e820 reserved area...

Bootdata ok (command line is apic=debug pci=routeirq
ramdisk_size=65536 root=/dev/ram0 rw console=tty0
console=ttyS0,115200n8 )
Linux version 2.6.15-gdb9edfd7 (root@yhlunb) (gcc version 4.0.2
20050901 (prerelease) (SUSE Linux)) #13 SMP Fri Jan 6 17:58:25 PST
2006
BIOS-provided physical RAM map:
 BIOS-e820: 0000000000000000 - 0000000000000e7c (reserved)
 BIOS-e820: 0000000000000e7c - 00000000000a0000 (usable)
 BIOS-e820: 00000000000f0000 - 00000000000f0400 (reserved)
 BIOS-e820: 0000000000100000 - 00000000c0000000 (usable)
 BIOS-e820: 0000000100000000 - 0000000240000000 (usable)

YH
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