RE: Latency traces I cannot interpret (sa1100, 2.6.15-rc7-rt1)

["kus Kusche Klaus" <kus@keba.com>]

> From: Daniel Walker
> On Mon, 2006-01-02 at 15:55 +0100, kus Kusche Klaus wrote:
> > As I wrote in some earlier mail, I'm probably the first one ever
> > who tried it on ARM: When I tried first, tracing didn't work at all,
> > because the trace timing macro's were not defined (at least for
> > sa1100). I quick-hacked the three missing macros (this caused the
> > tracer to produce at least some output) without checking if 
> > anything else is missing.
> What macro's are you talking about? Did you submit a patch already to
> fix that? If not, please do.

Too dirty to be a patch.

The missing pieces are:
#include <asm/arch/hardware.h>
#define mach_read_cycles() (OSCR)
#define mach_cycles_to_usecs(d) ((d)>>2)
#define mach_usecs_to_cycles(d) ((d)<<2)

First of all, they are plain wrong, because they use a factor of 4,
whereas the correct factor is 3.6864
(so the timings in my traces are not really microseconds).

However, I do not know how to do that quickly and correctly...
(64 bit arithmetic?)

Moreover, they should go to include/asm-arm/arch-sa1100/timex.h,
because only SA and PXA have an OSCR timer, and because the factor
differs across the chips, but I did them in include/asm-arm/timex.h.

(however, the macros are not defined for *any* ARM chip in the
current tree)

-- 
Klaus Kusche                 (Software Development - Control Systems)
KEBA AG             Gewerbepark Urfahr, A-4041 Linz, Austria (Europe)
Tel: +43 / 732 / 7090-3120                 Fax: +43 / 732 / 7090-6301
E-Mail: kus@keba.com                                WWW: www.keba.com
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