Burkhard Schölpen wrote:
... in the (rarely) faulty case, the 2nd burst only starts
> after another delay of about 600ns, which is too late
Looking at the PCI 2.3 specification,
arbitration latency on the order of a microsecond
or two does not seem excessive for a 33MHz bus.
... I deactivated all other pci devices that could disturb the transfers?
Are you accessing registers on your device
during the DMA transfers? If so, the CPU is
acting as a PCI master that could delay granting
the bus to your device.
--
Paul Fulghum
Microgate Systems, Ltd.
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