David Howells wrote:
Nick Piggin <[email protected]> wrote:(2) Those that have CMPXCHG or equivalent: 68020, i486+, x86_64, ia64, sparc. (3) Those that have LL/SC or equivalent: mips (some), alpha, powerpc, arm6.cmpxchg is basically exactly equivalent to a store-conditional, so 2 and 3 are the same level.No, they're not. LL/SC is more flexible than CMPXCHG because under some circumstances, you can get away without doing the SC, and because sometimes you can do one LL/SC in lieu of two CMPXCHG's because LL/SC allows you to retrieve the value, consider it and then modify it if you want to. With CMPXCHG you have to anticipate, and so you're more likely to get it wrong.
I don't think that is more flexible, just different. For example with cmpxchg you may not have to do the explicit load if you anticipate an unlocked mutex as the fastpath. My point is that they are of semantically equal strength.
I don't know why you don't implement a "good" default implementation with atomic_cmpxchg.Because it wouldn't be a good default.
You were proposing a worse default, which is the reason I suggested it.
I'm thinking the best default is simply to wrap a counting semaphore.
Probably.Send instant messages to your online friends http://au.messenger.yahoo.com -
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