Hi John
> > > On Fri, 2005-12-09 at 12:49 +1030, Jonathan Woithe wrote:
> > > > > I'm now working on why we mis-compensate the c3tsc clocksource in the
> > > > > -RT tree.
> > > >
> > > > No problem. Let me know when you have something to test or need further
> > > > info.
> > >
> > > Attached is a test patch to see if it doesn't resolve the issue for
> > > you. I get a maximum change in drift of 30ppm when idling between C3
> > > states by being more careful with the C3 TSC compensation and I also
> > > force timekeeping updates when cpufreq events occur.
> >
> > Unfortunately there's still an issue.
>
> Ah, drat.
>
> I'm just going to dump the c3tsc clocksource for now. If C3 mode is
> available, the ACPI PM timer is available (since it is used for C3
> timing), so we'll just fall back to ACPI PM if we see the cpu entering
> C3 mode.
>
> I'm working to respin a new release tonight, hopefully that will make it
> upstream to -rt soon and that should take care of it. Later I can look
> at reworking the c3tsc clocksource, but for now things need to just
> work.
Not a problem - I'll test this next release soon (perhaps via -rt) and
confirm that things "just work" for me. I'm happy to keep testing things -
if you do need further tests done for c3tsc in future drop me a line.
Regards
jonathan
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