On Tuesday 13 December 2005 7:35 am, Alan Stern wrote:
> On Tue, 13 Dec 2005, J.A. Magallon wrote:
> > PCI: cache line size of 128 is not supported by device 0000:00:1d.7
> > ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>
> I don't think that matters. It's more informational than a warning.
I don't even know why the PCI layer thinks we need to know about it.
Probably that came out as a side effect of noticing that the PCI
Memory-Write-Invalidate (MWI) cycle support can't be enabled; it's
an optional performance optimization, not widely supported for USB.
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