On Mon, 2005-12-12 at 18:20 +0300, Vitaly Wool wrote:
> Greetings,
Hi,
> this message fill be followed by the following four ones:
> 1) updated SPI core from Dmitry Pervushin/Vitaly Wool
> 2) Atmel MTD dataflash driver port for this core
> 3) SPI controller driver for Philips SPI controller
> 4) dumb EEPROM driver for EEPROM chip on SPI bus
>
> This SPI core features:
> * multiple SPI controller support
> * multiple devices on the same bus support
> * DMA support
> * synchronous and asynchronous transfers
> * library for asynchronous transfers on the bus using kernel threads
> * character device interface
> * custom lightweight SPI message allocation mechanism
[snipped]
One problem I still have with this implementation (well, if I remember
correctly David's has the same problem) is that it's not possible to
read/write from/to the SPI bus in interrupt context.
How do you handle IRQ's generated by a SPI device (e.g ack the
interrupt, check if it was the SPI device that generated the
interrupt, ...) if you can't read/write on the SPI bus from interrupt
context?
Rui
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