On Mer, 2005-12-07 at 16:50 +0100, Oliver Neukum wrote:
> But the atomic variant has to guard against interrupts, at least on
> architectures that do load/store only, hasn't it?
Yes. And you will see at least four different approaches
1. ll/sc where if the sequence was interrupted and may be stale it gets
retried
2. locked operations where the IRQ cannot split the sequence and use of
3. spin locks to provide atomic operations where there are architecture
limits
4. Use of instructions acting on memory where the CPU in question has
them and (as is usual in processors) does not permit an IRQ mid
instruction.
Thus on x86
*foo++
might be atomic, might not on uniprocessor v interrupt solely because
the compiler chooses the operations. Atomic_inc however merely has to
use asm to force an inc of a memory location target. That instruction
cannot be split part way by an interrupt so is sufficient.
Relative efficiency of spin_lock versus atomic_foo is very platform
dependant.
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