This patch is for updating m32r's MMU-less support.
Some legacy MMU-less m32r chips cannot return from a trap handler to
the right-hand side 16-bit halfword code of a 32-bit instrucion
code pair, because a "trap" instruction specification was expanded
in M32R-II ISA.
This modification forces "trap" instructions to be placed in
word alignment location with a parallel "nop" code.
Signed-off-by: Kazuhiro Inaoka <[email protected]>
Signed-off-by: Hirokazu Takata <[email protected]>
---
include/asm-m32r/unistd.h | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
Index: linux-2.6.15-rc5-mm1/include/asm-m32r/unistd.h
===================================================================
--- linux-2.6.15-rc5-mm1.orig/include/asm-m32r/unistd.h 2005-12-06 10:36:03.181901232 +0900
+++ linux-2.6.15-rc5-mm1/include/asm-m32r/unistd.h 2005-12-06 21:02:56.932741944 +0900
@@ -319,7 +319,7 @@ type name(void) \
register long __scno __asm__ ("r7") = __NR_##name; \
register long __res __asm__("r0"); \
__asm__ __volatile__ (\
- "trap #" SYSCALL_VECTOR \
+ "trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno) \
: "memory"); \
@@ -332,7 +332,7 @@ type name(type1 arg1) \
register long __scno __asm__ ("r7") = __NR_##name; \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
- "trap #" SYSCALL_VECTOR \
+ "trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res) \
: "memory"); \
@@ -346,7 +346,7 @@ register long __scno __asm__ ("r7") = __
register long __arg2 __asm__ ("r1") = (long)(arg2); \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
- "trap #" SYSCALL_VECTOR \
+ "trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res), "r" (__arg2) \
: "memory"); \
@@ -361,7 +361,7 @@ register long __arg3 __asm__ ("r2") = (l
register long __arg2 __asm__ ("r1") = (long)(arg2); \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
- "trap #" SYSCALL_VECTOR \
+ "trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res), "r" (__arg2), \
"r" (__arg3) \
@@ -378,7 +378,7 @@ register long __arg3 __asm__ ("r2") = (l
register long __arg2 __asm__ ("r1") = (long)(arg2); \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
- "trap #" SYSCALL_VECTOR \
+ "trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res), "r" (__arg2), \
"r" (__arg3), "r" (__arg4) \
@@ -397,7 +397,7 @@ register long __arg3 __asm__ ("r2") = (l
register long __arg2 __asm__ ("r1") = (long)(arg2); \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
- "trap #" SYSCALL_VECTOR \
+ "trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res), "r" (__arg2), \
"r" (__arg3), "r" (__arg4), "r" (__arg5) \
--
Hirokazu Takata <[email protected]>
Linux/M32R Project: http://www.linux-m32r.org/
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