Daniel J Blueman <[email protected]> writes:
> IIRC, the kernel (c. 2.6.14) still does nothing to setup the
> processors' PAT registers to enable write combining in one of the
> slots - the defaults the BIOS establishes do not cover this. Once this
> is done, drivers would readily be able to set page flags for a
> particular PAT slot, and MTRRs can (almost) be safely ignored.
As usual when something hasn't been done yet it's not that easy...
Problem is that they would very likely create very subtle problems
by creating conflicting mappings with the different cache attributes,
which leads to cache corruption and other nasty issues.
That is why more infrastructure is needed in the kernel to do this
properly.
-Andi
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