> We implemented AMD's reference algorithm, and made it work in the presence
> of a hardware IO hole. It seems to work beautifully, but the last step is
> turning a (node:chip-select) into a (node:dimm). Simple boards will use
> simple mappings, but we can't know that without board specific info.
> Especially with quad-rank DIMMs. :)
If you get something working it would be good if you could share the code
(even if it still needs to be tweaked)
>
> > > table to map chip-selects onto DIMMs? :)
> >
> > I proposed something like that - best with an ASCII string
> > ("First DIMM on the top left corner") But getting such stuff into BIOS
> > is difficult and long winded.
>
> It would be easy enough to get into LinuxBIOS. :)
>
> Seriously, this is work that is *long* overdue. I have been wanting to
> look at this for over a year, but I have not had time.
>
> Doing proper architecture and chipset-specific ECC/error handling which
> ties into a bigger abstracted error system is going to be really nice.
IMNSHO the x86-64 mce.c with its error log is a reasonable start. All
the smarts can be in user space and in mcelog.c. DIMM decoding
is a special case though because the information is really useful
to be printed onto the screen for fatal MCEs. So that one is better
in kernel space.
-Andi
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