Alan Cox wrote:
On Sul, 2005-11-13 at 11:59 +0100, Andi Kleen wrote:
Dave Jones <[email protected]> writes:
Looks like the Ubuntu people already did this...
http://www.kernel.org/git/?p=linux/kernel/git/bcollins/ubuntu-2.6.git;a=commitdiff;h=048985336e32efe665cddd348e92e4a4a5351415;hp=1cb630c2b5aaad7cedaa78aa135e6cecf5ab91ac
It's probably not needed. At least AMD K7/K8 has a SYSCFG MSR bit to
do this (or rather they disable bus cycles for locks that makes them
very cheap) Intel has one too in a different MSR that looks similar.
With some luck they're even already set by the BIOS on UP systems. I
know they are on some AMD systems.
I'd hope the vendors are not doing that by default because we have
kernel code that uses lock against not other processors but other bus
masters. The ECC code is one example. Is there any good info on the AMD
one so I can make the EDAC code put the processor back in x86 compatible
mode so that it behaves safely when scrubbing.
I can't speak about AMD, but on Transmeta's CPUs operations against
cached memory are *always* atomic; the atomicity is guaranteed by the
cache hierarchy. The LOCK prefix does have effects against uncached memory.
-hpa
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