On Sul, 2005-11-06 at 22:16 +0000, Russell King wrote:
> > This is actually true of some x86 hardware in the EISA space where there
> > is a control register for level v edge that we sort of half deal with.
>
> Thanks Alan. Can I assume you're happy with the patch, even if x86
> currently ignores the flags?
I'm certainly happy with it. Both the APIC and EISA IRQ control
registers could even be made to honour it if anyone ever needed to.
Should platforms that don't support the flags be patched to error
requests they don't support however ?
Alan
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