Doug Thompson wrote (ao):
> --- Sander <[email protected]> wrote:
> > Via Epia MII 10000, kernel 2.6.14-rc4-mm1:
> The EDAC scanning code first scans the STATUS register
> of all the PCI devices in the system. This status
> register reflects operations on the main bus.
> Second, the code scans the SECONDARY STATUS register
> of all bridge devices, which reflects operations on
> the sub-bus.
>
> This instance (0000:00:01.0) of output shows me the
> VIA VT8633 is generating the parity bit. The default
> poll interval if 1000 ms and the above output shows
> this. This bridge is either having a parity error on
> the main bus OR more likely is generating false
> positives. How to determine which? More investigation
> is needed.
Anything I can do? And will blacklisting make EDAC useless? If so, does
it make more sense not to configure EDAC?
--
Humilis IT Services and Solutions
http://www.humilis.net
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