[PATCH 2.6.14-rc4] kbuild: once again use Makefiles in obj tree

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I believe that I have found and fixed the problem that I encountered earlier this week
with Makefiles not being used from the objects tree as they had been in every 2.6 kernel
I have worked with since 2.6.5. I I view this as a regression in 2.6.14-rc4. I believe
that the following patch fixes it.


--- a/scripts/Makefile.build	2005-10-11 09:27:42.150471811 -0500
+++ b/scripts/Makefile.build	2005-10-11 11:28:10.748640516 -0500
@@ -12,7 +12,11 @@
 
 # The filename Kbuild has precedence over Makefile
 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
-include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile)
+kbuild-inc := $(wildcard $(obj)/Kbuild)
+kbuild-inc := $(if $(kbuild-inc),$(kbuild-inc),$(wildcard $(kbuild-dir)/Kbuild))
+kbuild-inc := $(if $(kbuild-inc),$(kbuild-inc),$(wildcard $(obj)/Makefile))
+kbuild-inc := $(if $(kbuild-inc),$(kbuild-inc),$(kbuild-dir)/Makefile)
+include $(kbuild-inc)
 
 include scripts/Kbuild.include
 include scripts/Makefile.lib
--- a/scripts/Makefile.clean	2005-10-11 09:27:42.150471811 -0500
+++ b/scripts/Makefile.clean	2005-10-11 11:28:20.622769436 -0500
@@ -14,7 +14,11 @@
 
 # The filename Kbuild has precedence over Makefile
 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
-include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile)
+kbuild-inc := $(wildcard $(obj)/Kbuild)
+kbuild-inc := $(if $(kbuild-inc),$(kbuild-inc),$(wildcard $(kbuild-dir)/Kbuild))
+kbuild-inc := $(if $(kbuild-inc),$(kbuild-inc),$(wildcard $(obj)/Makefile))
+kbuild-inc := $(if $(kbuild-inc),$(kbuild-inc),$(kbuild-dir)/Makefile)
+include $(kbuild-inc)
 
 # Figure out what we need to build from the various variables
 # ==========================================================================


Signed-off-by: Mark Rustad <[email protected]>
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