Bill Davidsen <[email protected]> writes:
> Eric W. Biederman wrote:
>> The per cpu nmi watchdog timer is based on an event counter. idle cpus don't
>> generate events so the NMI watchdog doesn't fire
>> and the test to see if the watchdog is working fails.
>
> Question: given all the concern about reducing clocks and all, do we actually
> need nmi on more than one CPU? Are there cases where a single CPU hangs in idle
> on an SMP system?
I really don't know, but the normal interrupt rate is once per second or slower
if the cpu is idle. I was just working in the vicinity and discovered when
I enabled the nmi watchdog it failed to come on because it didn't handled it's
initialization test properly, and x86_64 had already fixed it.
Eric
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