Hello, Andi.
In include/asm-x86_64/page.h, __VIRTUAL_MASK_SHIFT is defined as 48
bits which is the size of virtual address space on current x86_64
machines as used as such. OTOH, __PHYSICAL_MASK_SHIFT is defined as 46
and used as mask shift for physical page address (i.e. physaddr >> 12).
In addition to being a bit confusing due to similar names but
different meanings, this means that we assume processors can physically
address 58 (46 + 12) bits, but both amd64 and IA-32e manuals say that
current architectural limit is 52 bits and bits 52-62 are reserved in
all page table entries. This currently (and in foreseeable future)
doesn't cause any problem but it's still a bit weird.
Am I missing something?
Thanks.
--
tejun
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