> On Mon, 2005-09-19 at 21:49 +0200, Andi Kleen wrote:
> > On Mon, Sep 19, 2005 at 12:42:16PM -0700, john stultz wrote:
> > > On Mon, 2005-09-19 at 21:31 +0200, Andi Kleen wrote:
> > > > On Mon, Sep 19, 2005 at 12:16:43PM -0700, john stultz wrote:
> > > > > This patch should resolve the issue seen in
> bugme bug #5105,
> > > > > where it is assumed that dualcore x86_64 systems have synced
> > > > > TSCs. This is not the case, and alternate timesources
> should be
> > > > > used instead.
> > > >
> > > >
> > > > I asked AMD some time ago and they told me it was synchronized.
> > > > The TSC on K8 is C state invariant, but not P state
> invariant, but
> > > > P states always happen synchronized on dual cores.
> > > >
> > > > So I'm not quite convinced of your explanation yet.
> > >
> > > Would a litter userspace test checking the TSC
> synchronization maybe
> > > shed additional light on the issue?
> >
> > Sure you can try it.
>
> So, bugzilla.kernel.org has (temporarily at least) lost the
> reports from yesterday, but from the email i got, folks using
> my TSC consistency check that I posted were seeing what
> appears to be unsynched TSCs on dualcore AMD systems.
My understanding was that each TSC on a dual-core processor
will advance individually and atomically. They will not
always be in synchronization.
> Personally I suspect that the powernow driver is putting the
> cores independently into low power sleep and the TSCs are
> being independently halted, causing them to become unsynchronized.
The powernow-k8 driver doesn't know what a low power sleep state
is, so I strongly doubt it is involved here. It only handles
pstates.
-Mark Langsdorf
K8 PowerNow! Maintainer
AMD, Inc.
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