Hi, On Wed, 14 Sep 2005, Russell King wrote: > > do { > > old = atomic_load_locked(v); > > if (!old) > > break; > > new = old + 1; > > } while (!atomic_store_lock(v, old, new)); > > How do you propose architectures which don't have locked loads implement > this, where the only atomic instruction is an unconditional atomic swap > between memory and CPU register? #define atomic_store_lock atomic_cmpxchg bye, Roman - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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