Linus Torvalds wrote:
On Tue, 30 Aug 2005, Jon Smirl wrote:
I was reading the status out of the PCI config space to account for
our friend X which enables ROMs without informing the OS. With X
around PCI config space can get out of sync with the kernel
structures.
Well, yes, except that we use the in-kernel resource address for the
actual ioremap() _anyway_ in the routine that calls this, so if X has
remapped the ROM somewhere else, that wouldn't work in the first place.
I'm sure X plays games with this register (I suspect that's why the Matrox
thing broke in the first place), but I don't think it should do so while
the kernel uses it.
Matrox broke because some of their chips have ROM base bits 31-1 reserved
(read as 0) when bit 0 is cleared. So if you read valid ROM resource,
clear enable bit, write it to the device, and later it read from device,
enable it, and write back, you'll end up with ROM enabled at bus address
zero. Probably not what you want.
And FYI, on my Tyan S2885 box 2.6.13 relocates all (as far as I can tell)
ROMs because BIOS assigns them into 'MEM window' (non-prefetchable) while
kernel reassigns then to the 'PREFETCH window'. In the past code was
even allocating ROM resources above 4GB (which is nonsense for ROM region,
unfortunately pci_bus_alloc_resource does not seem to know about difference
between 64bit and 32bit BARs, and it always uses -1 as max address, which
is wrong on 64bit kernel), but it does not happen since I went from 4GB
of memory back to 2GB...
Petr Vandrovec
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