On Thu, 28 Jul 2005, Russell King wrote:
> ARM can't support atomic page table operations as such - the Linux view
> of the page table is separate from the hardware view, and there's some
> CPU specific code which translates from the Linux view to the hardware
> view.
Yes. The patches fall back to nonatomic operations for ARM.
> Looking at the actual patches, particularly pte_xchg-and-pte_cmpxchg.patch
> combined with the above, the ARM solution would be to go back to using
> non-atomic operations here (since we can't do this atomically.) Also,
> since the MMU will only ever read from the page tables, I don't think
> we need to play any games with clearing out ptes before we replace the
> value.
Ok. Then you can use a part of the patches. Define ptep_xchg and
ptep_cmpxchg for ARM so that you do can avoid intermittently clearing
ptes.
Here is the patch that I sent to Andrew in the morning:
Index: linux-2.6.13-rc3/mm/memory.c
===================================================================
--- linux-2.6.13-rc3.orig/mm/memory.c 2005-07-27 15:34:41.000000000 -0700
+++ linux-2.6.13-rc3/mm/memory.c 2005-07-28 09:24:05.000000000 -0700
@@ -2071,6 +2071,7 @@
*/
page_table_atomic_start(mm);
pgd = pgd_offset(mm, address);
+#ifndef __PAGETABLE_PUD_FOLDED
if (unlikely(pgd_none(*pgd))) {
pud_t *new;
@@ -2084,6 +2085,7 @@
if (!pgd_test_and_populate(mm, pgd, new))
pud_free(new);
}
+#endif
pud = pud_offset(pgd, address);
if (unlikely(pud_none(*pud))) {
-
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