Am Sonntag, 17. Juli 2005 14:07 schrieb Karsten Wiese:
> Am Samstag, 16. Juli 2005 19:15 schrieb Ingo Molnar:
> >
> > * Karsten Wiese <[email protected]> wrote:
> >
> > > Have I corrected the other path of ioapic early initialization, which
> > > had lacked virtual-address setup before ioapic_data[ioapic] was to be
> > > filled in -51-28? Please test attached patch on top of -51-29 or
> > > later. Also on Systems that liked -51-28.
> >
> > thanks - i've applied it to my tree and have released the -51-31 patch.
> > It looks good on my testboxes.
> >
> Found another error:
> the ioapic cache isn't fully initialized in -51-31's ioapic_cache_init().
> <snip>
>
and another: some NULL-pointers are used in -51-31 instead of ioapic_data[0].
Please apply attached patch on top of -51-31. It includes yesterday's fix.
Karsten
--- linux-2.6.12-RT-51-31/arch/i386/kernel/io_apic.c 2005-07-17 12:40:35.000000000 +0200
+++ linux-2.6.12-RT/arch/i386/kernel/io_apic.c 2005-07-19 12:53:00.000000000 +0200
@@ -158,7 +158,7 @@
static void __init ioapic_cache_init(struct ioapic_data_struct *ioapic)
{
int reg;
- for (reg = 0; reg < (ioapic->nr_registers + 10); reg++)
+ for (reg = 0; reg < (0x10 + 2 * ioapic->nr_registers); reg++)
ioapic->cached_val[reg] = __raw_io_apic_read(ioapic, reg);
}
# endif
@@ -1396,8 +1396,8 @@
* Add it to the IO-APIC irq-routing table:
*/
spin_lock_irqsave(&ioapic_lock, flags);
- io_apic_write(0, 0x11+2*pin, *(((int *)&entry)+1));
- io_apic_write(0, 0x10+2*pin, *(((int *)&entry)+0));
+ io_apic_write(ioapic_data[0], 0x11+2*pin, *(((int *)&entry)+1));
+ io_apic_write(ioapic_data[0], 0x10+2*pin, *(((int *)&entry)+0));
spin_unlock_irqrestore(&ioapic_lock, flags);
enable_8259A_irq(0);
@@ -2087,25 +2087,25 @@
* races.
*/
static struct hw_interrupt_type ioapic_edge_type = {
- .typename = "IO-APIC-edge",
+ .typename = "IO-APIC-edge",
.startup = startup_edge_ioapic,
.shutdown = shutdown_edge_ioapic,
.enable = enable_edge_ioapic,
.disable = disable_edge_ioapic,
.ack = ack_edge_ioapic,
.end = end_edge_ioapic,
- .set_affinity = set_ioapic_affinity,
+ .set_affinity = set_ioapic_affinity,
};
static struct hw_interrupt_type ioapic_level_type = {
- .typename = "IO-APIC-level",
+ .typename = "IO-APIC-level",
.startup = startup_level_ioapic,
.shutdown = shutdown_level_ioapic,
.enable = enable_level_ioapic,
.disable = disable_level_ioapic,
.ack = mask_and_ack_level_ioapic,
.end = end_level_ioapic,
- .set_affinity = set_ioapic_affinity,
+ .set_affinity = set_ioapic_affinity,
};
static inline void init_IO_APIC_traps(void)
@@ -2169,13 +2169,13 @@
static void end_lapic_irq (unsigned int i) { /* nothing */ }
static struct hw_interrupt_type lapic_irq_type = {
- .typename = "local-APIC-edge",
- .startup = NULL, /* startup_irq() not used for IRQ0 */
- .shutdown = NULL, /* shutdown_irq() not used for IRQ0 */
- .enable = enable_lapic_irq,
- .disable = disable_lapic_irq,
- .ack = ack_lapic_irq,
- .end = end_lapic_irq
+ .typename = "local-APIC-edge",
+ .startup = NULL, /* startup_irq() not used for IRQ0 */
+ .shutdown = NULL, /* shutdown_irq() not used for IRQ0 */
+ .enable = enable_lapic_irq,
+ .disable = disable_lapic_irq,
+ .ack = ack_lapic_irq,
+ .end = end_lapic_irq
};
static void setup_nmi (void)
@@ -2209,16 +2209,17 @@
struct IO_APIC_route_entry entry0, entry1;
unsigned char save_control, save_freq_select;
unsigned long flags;
+ struct ioapic_data_struct *ioapic0 = ioapic_data[0];
pin = find_isa_irq_pin(8, mp_INT);
if (pin == -1)
return;
spin_lock_irqsave(&ioapic_lock, flags);
- *(((int *)&entry0) + 1) = io_apic_read(0, 0x11 + 2 * pin);
- *(((int *)&entry0) + 0) = io_apic_read(0, 0x10 + 2 * pin);
+ *(((int *)&entry0) + 1) = io_apic_read(ioapic0, 0x11 + 2 * pin);
+ *(((int *)&entry0) + 0) = io_apic_read(ioapic0, 0x10 + 2 * pin);
spin_unlock_irqrestore(&ioapic_lock, flags);
- clear_IO_APIC_pin(0, pin);
+ clear_IO_APIC_pin(ioapic0, pin);
memset(&entry1, 0, sizeof(entry1));
@@ -2231,8 +2232,8 @@
entry1.vector = 0;
spin_lock_irqsave(&ioapic_lock, flags);
- io_apic_write(0, 0x11 + 2 * pin, *(((int *)&entry1) + 1));
- io_apic_write(0, 0x10 + 2 * pin, *(((int *)&entry1) + 0));
+ io_apic_write(ioapic0, 0x11 + 2 * pin, *(((int *)&entry1) + 1));
+ io_apic_write(ioapic0, 0x10 + 2 * pin, *(((int *)&entry1) + 0));
spin_unlock_irqrestore(&ioapic_lock, flags);
save_control = CMOS_READ(RTC_CONTROL);
@@ -2250,11 +2251,11 @@
CMOS_WRITE(save_control, RTC_CONTROL);
CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
- clear_IO_APIC_pin(0, pin);
+ clear_IO_APIC_pin(ioapic0, pin);
spin_lock_irqsave(&ioapic_lock, flags);
- io_apic_write(0, 0x11 + 2 * pin, *(((int *)&entry0) + 1));
- io_apic_write(0, 0x10 + 2 * pin, *(((int *)&entry0) + 0));
+ io_apic_write(ioapic0, 0x11 + 2 * pin, *(((int *)&entry0) + 1));
+ io_apic_write(ioapic0, 0x10 + 2 * pin, *(((int *)&entry0) + 0));
spin_unlock_irqrestore(&ioapic_lock, flags);
}
@@ -2268,6 +2269,7 @@
{
int pin1, pin2;
int vector;
+ struct ioapic_data_struct *ioapic0 = ioapic_data[0];
/*
* get/set the timer IRQ vector:
@@ -2309,7 +2311,7 @@
}
return;
}
- clear_IO_APIC_pin(0, pin1);
+ clear_IO_APIC_pin(ioapic0, pin1);
printk(KERN_ERR "..MP-BIOS bug: 8254 timer not connected to IO-APIC\n");
}
@@ -2334,7 +2336,7 @@
/*
* Cleanup, just in case ...
*/
- clear_IO_APIC_pin(0, pin2);
+ clear_IO_APIC_pin(ioapic0, pin2);
}
printk(" failed.\n");
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