On Thu, 2005-07-14 at 16:39, Andrew Morton wrote:
> Daniel McNeil <[email protected]> wrote:
> >
> > Do drivers have problems with odd addresses or with
> > non-512 addresses?
>
> I do recall hearing rumours that some bus-masters have fairly strict memory
> alignment requirements. A cacheline size, perhaps - that would be 32 bytes
> given the age of the hardware.
>
> But yeah, it's v. risky to assume that all bus masters can cope with
> memory alignments down to two bytes.
>
> It would be sane to put the minimum alignment into ->backing_dev_info,
> default to 512, get the device drivers to override that as they are tested.
>
> But this introduces a very very bad problem: people will write applications
> which work on their hardware, ship the things and then find that the apps
> break on other people's hardware. So we can't do that.
>
> Instead, we need to work out the minimum alignment requirement for all disk
> controllers and DMA controllers and motherboards in the world. And that
> includes catering for weird ones which appear to work but which
> occasionally fail in mysterious ways with finer alignments. That's hard.
> It's easier to continue to make application developers jump through hoops.
I was hoping this patch would help turn rumors into real data :)
If we did put min alignment into backing_dev_info, we could implement
the equivalent of bounce buffers for direct-io -- or just fall back
to buffer i/o like it does sometimes anyway. That way application
would not break, just get worse performance on some hardware.
Right now I just wanted to get the issues on table, get some test
results, and see how to proceed from there. Since this patch only
affects direct i/o, getting test results shouldn't cause too many
problems.
Thanks,
Daniel
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