[patch 2/2] Avoid wasting IRQs patch update (x86_64)

[Natalie.Protasevich@unisys.com]

The patch adds boundary check for the MAX_GSI_NUM.
Same as the update for i386, the patch addresses a problem with ACPI SCI IRQ. 
The patch corrects the code such that SCI IRQ is skipped and duplicate entry is avoided.
The VIA chipset uses 4-bit IRQ register for internal interrupt routing, and therefore 
cannot handle IRQ numbers assigned to its devices. The patch corrects this problem
by allowing PCI IRQs below 16.

Signed-off by: Natalie Protasevich  <Natalie.Protasevich@unisys.com>

---


diff -puN arch/x86_64/kernel/mpparse.c~irq-pack-x86_64-update arch/x86_64/kernel/mpparse.c
--- linux-2.6.13-rc2/arch/x86_64/kernel/mpparse.c~irq-pack-x86_64-update	2005-07-10 01:36:23.628899784 -0700
+++ linux-2.6.13-rc2-root/arch/x86_64/kernel/mpparse.c	2005-07-10 01:36:23.641897808 -0700
@@ -965,8 +965,21 @@ int mp_register_gsi(u32 gsi, int edge_le
 		 * due to unused I/O APIC pins.
 		 */
 		int irq = gsi;
-		gsi = pci_irq++;
-		gsi_to_irq[irq] = gsi;
+		if (gsi < MAX_GSI_NUM) {
+			if (gsi > 15)
+				gsi = pci_irq++;
+#ifdef CONFIG_ACPI_BUS
+			/*
+			 * Don't assign IRQ used by ACPI SCI
+			 */
+			if (gsi == acpi_fadt.sci_int)
+				gsi = pci_irq++;
+#endif
+			gsi_to_irq[irq] = gsi;
+		} else {
+			printk(KERN_ERR "GSI %u is too high\n", gsi);
+			return gsi;
+		}
 	}
 
 	io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
_
-
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